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Balanced redundancy utilization in embedded memory cores for dependable systems - Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings. 17th IEEE International S http://www.ece.neu.edu/groups/hpvlsi/publication/Balanced_DFT.pdfAdvances in revolutionary System-on-Chip (SoC) technology mainly depend on the high performance and ultra dependable system core components. Among those core components, embedded ... http://csdl2.computer.org/persagen/DLAbsToc.jsp?resourcePath=/dl/proceedings/&toc=comp/proceedings/dft/2002/1831/00/1831toc.xml&DOI=10.1109/DFTVS.2002.1173540Click here for full text: On the Redundancy of Two-Dimensional Balanced Codes. Ordentlich, Erik; Roth, Ron M. HPL-97-143 971202 External Keyword(s): balanced arrays; http://www.hpl.hp.com/techreports/97/HPL-97-143.htmlThis solution offers no redundancy. PowWeb's Load Balanced Hosting Technology (the solution): PowWeb's hosting solution offers complete true, redundancy from point A to point ... http://www.powweb.com/powweb/techOverview.bmlThere are objective criteria for redundancy, based on the requirements of the organisation; A communication plan exists for the redundancy process; Maintenance of a balanced ... http://www.agepositive.gov.uk/good_practice/redundancy.asp |
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